Roadmap
Roadmap
asmgen — Roadmap
go-asmgen grew along two axes: wider type support within an architecture, and more architectures over a shared ABI0 layout model. Both were broadly covered by v0.5.0. Later releases brought:
- the wasm-SIMD kernel catalogue (see the wasm roadmap);
- the amd64 CPU feature probes (
AVX2,POPCNT,AVX512F,FMA) and a CPUID vendor probe (VendorProbe, v0.12.0) for tuning; - vector float64 arithmetic on arm64 (v0.10.0), ppc64le (v0.13.0) and loong64
(v0.14.0), each run bit-identical to Go’s arithmetic and
math.FMAon hardware.
v0.15.0 returns to cmd/asm encoding wherever Go allows it. The arm64
methods emit VFADD… (Go 1.27; the minimum is 1.27.1 since v0.15.2) and the loong64 broadcast load
emits VMOVQ off(R), V.V2. Instructions Go cannot assemble yet are registered,
patched and watched; see Instructions cmd/asm lacks.
v0.16.0 adds the arm64 float32 vector methods (VFADD4S … VFMLS4S,
VFNEG4S), as cmd/asm mnemonics.
v0 — proof of pipeline — done
- arm64, ABI0, sequences of 8-byte int/ptr arguments and results.
- ISA-agnostic
emittext writer. - End-to-end
go:generateexample, validated by asmdecl + a native arm64 runtime test, with the library held to 100% coverage.
Widen arm64 scalar support — done
- 1/2/4/8-byte signed and unsigned integers and pointers, with correct move
selection (
MOVB/MOVBU,MOVH/MOVHU,MOVW/MOVWU,MOVD) and sub-word sign/zero extension. - Floating-point registers (
F0..) withFMOVS/FMOVD. - Word-aligned result area and per-type argument alignment.
- Every case validated against
go vetasmdecl and runtime tests on native arm64 (seeexamples/types).
Shared ABI0 model + more architectures — done
- Extracted the architecture-independent ABI0 layout into
abi; arm64 re-exports it with no behaviour change. - Added riscv64 (page), loong64 (page),
amd64 (page), ppc64le (page) and s390x
(page) as thin architectures over the shared model — each only a
move table. 100% coverage, asmdecl +
cmd/asmvalidated, and runtime-proven (natively on amd64/arm64, under qemu-user for riscv64/loong64/ppc64le/s390x, the s390x run exercising the big-endian path). - Promoted
abiandemitout ofinternal/so the library is importable.
Aggregates — done
- Struct, slice, and string parameters laid out by Go’s struct rules, each field
addressed as
name_field+offset(FP), asmdecl- and runtime-validated. See Aggregates.
Arrays — done
- Fixed-size
[n]Tarrays passed by value, addressed element-wise (name_0 … name_(n-1)) viaabi.Array;Signature.Slotfor offset lookup. asmdecl-clean and runtime-proven. See Aggregates.
ppc64le + s390x — done — v0.5.0
- Added ppc64le (page) and s390x (page) as the
fifth and sixth targets, completing all six 64-bit Go SIMD architectures. Both
use the move table
MOVD/FMOVS/FMOVD; s390x is big-endian, and its runtime job deliberately exercises that path. Validated under qemu-user onubuntu-latest(default CPU for ppc64le;QEMU_CPU=maxfor s390x), asmdecl +cmd/asmclean, 100% coverage. Released as v0.5.0.
SIMD — done (via Raw)
- Packed-add examples on all six targets, runtime-proven, including the
256-bit widths: SSE2 + AVX2 (amd64), NEON (arm64), RVV (riscv64), LSX +
LASX (loong64), VSX (ppc64le), vector facility (s390x). Emitted
through
Rawover pointer arguments — see SIMD. A single vector load of a whole by-value array is not asmdecl-clean, so passing vectors by value is not pursued. - Possible future work: a typed vector-load helper that emits the
pointer-based load/op/store sequence, removing the
Rawboilerplate.
Stack frames and TEXT flags — done
NewFuncFlagsemits any Plan 9 TEXT flags (NOSPLIT,NOSPLIT|NOFRAME, or none);frameSize > 0reserves stack locals addressedname-N(SP)viaRaw. See TEXT flags and stack frames andexamples/frame— a non-NOSPLITfunction that spills to a 16-byte frame, runtime-proven.
Adding another architecture
- Any further 64-bit target follows the same recipe: re-export the shared
abitypes and add oneloadMnemonic/storeMnemonicpair.
Possible future work
- Derive instruction-mnemonic tables from
cmd/internal/objto catch typos at generation time — still delegating actual encoding tocmd/asm. - Differential encoding checks wired into CI as an additional guard against emit-layer regressions.